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Jeffallan/claude-skills/skills/embedded-systems/SKILL.md

embedded-systems

Use when developing firmware for microcontrollers, implementing RTOS applications, or optimizing power consumption. Invoke for STM32, ESP32, FreeRTOS, bare-metal, power optimization, real-time systems, configure peripherals, write interrupt handlers, implement DMA transfers, debug timing issues.

Source repository stars
10,762
Declared platforms
0
Static risk flags
0
Last source update
2026-05-20
Source checked
2026-07-28

Decision brief

What it does—and where it fits

Senior embedded systems engineer with deep expertise in microcontroller programming, RTOS implementation, and hardware-software integration for resource-constrained devices.

Best for

  • Use when developing firmware for microcontrollers, implementing RTOS applications, or optimizing power consumption.

Not for

  • Tasks that require unconfirmed production actions or broad system permissions.
  • Environments where the pinned source and install steps cannot be inspected.

Compatibility matrix

Platform support, with evidence labels

PlatformStatusEvidenceWhat to check
CodexNot declaredNo explicit evidencePortability before use
Claude CodeNot declaredNo explicit evidencePortability before use
CursorNot declaredNo explicit evidencePortability before use
Gemini CLINot declaredNo explicit evidencePortability before use
Open the compatibility checker

Installation

Inspect first. Install second.

The source command is displayed only when detected. A safe inspection prompt is always available so your agent can explain every action before execution.

Source-detected install commandSource
npx skills add https://github.com/Jeffallan/claude-skills --skill "skills/embedded-systems"
Safe inspection promptEditorial

Inspect the Agent Skill "embedded-systems" from https://github.com/Jeffallan/claude-skills/blob/e8be415bc94d8d6ebddc2fb50e5d03c6e27d4319/skills/embedded-systems/SKILL.md at commit e8be415bc94d8d6ebddc2fb50e5d03c6e27d4319. List every install step, command, network request, credential, file read/write, external action, and rollback step. Explain whether it fits my task. Do not install or execute anything until I approve.

Workflow

What the source asks the agent to do

  1. 01

    Core Workflow

    1. Analyze constraints - Identify MCU specs, memory limits, timing requirements, power budget 2. Design architecture - Plan task structure, interrupts, peripherals, memory layout 3. Implement drivers - Write HAL, peripheral drivers, RTOS integration 4. Validate implementation -…

    Analyze constraints - Identify MCU specs, memory limits, timing requirements, power budgetDesign architecture - Plan task structure, interrupts, peripherals, memory layoutImplement drivers - Write HAL, peripheral drivers, RTOS integration
  2. 02

    Reference Guide

    Load detailed guidance based on context:

    Load detailed guidance based on context:
  3. 03

    Constraints

    Optimize for code size and RAM usage

    Optimize for code size and RAM usageUse volatile for hardware registers and ISR-shared variablesImplement proper interrupt handling (short ISRs, defer work to tasks)
  4. 04

    MUST DO

    Optimize for code size and RAM usage

    Optimize for code size and RAM usageUse volatile for hardware registers and ISR-shared variablesImplement proper interrupt handling (short ISRs, defer work to tasks)
  5. 05

    MUST NOT DO

    Use blocking operations in ISRs

    Use blocking operations in ISRsAllocate memory dynamically without bounds checkingSkip critical section protection

Permission review

Static risk signals and limitations

No configured static risk pattern was detected

This is not proof of safety. Runtime behavior, indirect dependencies, and hidden external systems are outside the static scan.

Evidence record

Why each signal appears

EvidenceSourceComputedTestedEditorial
SignalValueEvidence typeMeaning
Quality score83/100ComputedDocumentation, specificity, maintenance, and trust rules
Repository stars10,762SourceRepository attention, not individual Skill quality
Compatibility0 platformsSourceDeclared in the catalog source record
Usage guideautomated source guideEditorialGenerated or reviewed according to the visible evidence level

Pinned source

Provenance and original SKILL.md

Repository
Jeffallan/claude-skills
Skill path
skills/embedded-systems/SKILL.md
Commit
e8be415bc94d8d6ebddc2fb50e5d03c6e27d4319
License
MIT
Collected
2026-07-28
Default branch
main
View the original SKILL.md

Embedded Systems Engineer

Senior embedded systems engineer with deep expertise in microcontroller programming, RTOS implementation, and hardware-software integration for resource-constrained devices.

Core Workflow

  1. Analyze constraints - Identify MCU specs, memory limits, timing requirements, power budget
  2. Design architecture - Plan task structure, interrupts, peripherals, memory layout
  3. Implement drivers - Write HAL, peripheral drivers, RTOS integration
  4. Validate implementation - Compile with -Wall -Werror, verify no warnings; run static analysis (e.g. cppcheck); confirm correct register bit-field usage against datasheet
  5. Optimize resources - Minimize code size, RAM usage, power consumption
  6. Test and verify - Validate timing with logic analyzer or oscilloscope; check stack usage with uxTaskGetStackHighWaterMark(); measure ISR latency; confirm no missed deadlines under worst-case load; if issues found, return to step 4

Reference Guide

Load detailed guidance based on context:

TopicReferenceLoad When
RTOS Patternsreferences/rtos-patterns.mdFreeRTOS tasks, queues, synchronization
Microcontrollerreferences/microcontroller-programming.mdBare-metal, registers, peripherals, interrupts
Power Managementreferences/power-optimization.mdSleep modes, low-power design, battery life
Communicationreferences/communication-protocols.mdI2C, SPI, UART, CAN implementation
Memory & Performancereferences/memory-optimization.mdCode size, RAM usage, flash management

Constraints

MUST DO

  • Optimize for code size and RAM usage
  • Use volatile for hardware registers and ISR-shared variables
  • Implement proper interrupt handling (short ISRs, defer work to tasks)
  • Add watchdog timer for reliability
  • Use proper synchronization primitives
  • Document resource usage (flash, RAM, power)
  • Handle all error conditions
  • Consider timing constraints and jitter

MUST NOT DO

  • Use blocking operations in ISRs
  • Allocate memory dynamically without bounds checking
  • Skip critical section protection
  • Ignore hardware errata and limitations
  • Use floating-point without hardware support awareness
  • Access shared resources without synchronization
  • Hardcode hardware-specific values
  • Ignore power consumption requirements

Code Templates

Minimal ISR Pattern (ARM Cortex-M / STM32 HAL)

/* Flag shared between ISR and task — must be volatile */
static volatile uint8_t g_uart_rx_flag = 0;
static volatile uint8_t g_uart_rx_byte = 0;

/* Keep ISR short: read hardware, set flag, exit */
void USART2_IRQHandler(void) {
    if (USART2->SR & USART_SR_RXNE) {
        g_uart_rx_byte = (uint8_t)(USART2->DR & 0xFF); /* clears RXNE */
        g_uart_rx_flag = 1;
    }
}

/* Main loop or RTOS task processes the flag */
void process_uart(void) {
    if (g_uart_rx_flag) {
        __disable_irq();                   /* enter critical section */
        uint8_t byte = g_uart_rx_byte;
        g_uart_rx_flag = 0;
        __enable_irq();                    /* exit critical section  */
        handle_byte(byte);
    }
}

FreeRTOS Task Creation Skeleton

#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"

#define SENSOR_TASK_STACK  256   /* words */
#define SENSOR_TASK_PRIO   2

static QueueHandle_t xSensorQueue;

static void vSensorTask(void *pvParameters) {
    TickType_t xLastWakeTime = xTaskGetTickCount();
    const TickType_t xPeriod  = pdMS_TO_TICKS(10); /* 10 ms period */

    for (;;) {
        /* Periodic, deadline-driven read */
        uint16_t raw = adc_read_channel(ADC_CH0);
        xQueueSend(xSensorQueue, &raw, 0); /* non-blocking send */

        /* Check stack headroom in debug builds */
        configASSERT(uxTaskGetStackHighWaterMark(NULL) > 32);

        vTaskDelayUntil(&xLastWakeTime, xPeriod);
    }
}

void app_init(void) {
    xSensorQueue = xQueueCreate(8, sizeof(uint16_t));
    configASSERT(xSensorQueue != NULL);

    xTaskCreate(vSensorTask, "Sensor", SENSOR_TASK_STACK,
                NULL, SENSOR_TASK_PRIO, NULL);
    vTaskStartScheduler();
}

GPIO + Timer-Interrupt Blink (Bare-Metal STM32)

/* Demonstrates: clock enable, register-level GPIO, TIM2 interrupt */
#include "stm32f4xx.h"

void TIM2_IRQHandler(void) {
    if (TIM2->SR & TIM_SR_UIF) {
        TIM2->SR &= ~TIM_SR_UIF;           /* clear update flag */
        GPIOA->ODR ^= GPIO_ODR_OD5;        /* toggle LED on PA5  */
    }
}

void blink_init(void) {
    /* GPIO */
    RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
    GPIOA->MODER |= GPIO_MODER_MODER5_0;  /* PA5 output */

    /* TIM2 @ ~1 Hz (84 MHz APB1 × 2 = 84 MHz timer clock) */
    RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
    TIM2->PSC  = 8399;   /* /8400  → 10 kHz  */
    TIM2->ARR  = 9999;   /* /10000 → 1 Hz    */
    TIM2->DIER |= TIM_DIER_UIE;
    TIM2->CR1  |= TIM_CR1_CEN;

    NVIC_SetPriority(TIM2_IRQn, 6);
    NVIC_EnableIRQ(TIM2_IRQn);
}

Output Templates

When implementing embedded features, provide:

  1. Hardware initialization code (clocks, peripherals, GPIO)
  2. Driver implementation (HAL layer, interrupt handlers)
  3. Application code (RTOS tasks or main loop)
  4. Resource usage summary (flash, RAM, power estimate)
  5. Brief explanation of timing and optimization decisions

Documentation

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